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  5. A 14.5Gb/s word alignment circuit in 0.18μm CMOS technology for high-speed SerDes

A 14.5Gb/s word alignment circuit in 0.18μm CMOS technology for high-speed SerDes

来源 :高技术通讯（英文版） | 被引量 : 0次 | 上传用户：dvcsvf
【作 者】
：
Ruan Weihua Hu Qingsheng 
【机 构】
：
Institute of RF-&OE-lCs
【出 处】
：
高技术通讯（英文版）
【发表日期】
：
2004年期
【关键词】
：
comma detection word alignment pipeline full custom parallel structure 
【基金项目】
：
Supported by the National High Technology Research and Development Programme of China
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