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随着智能电网的迅速发展,对时间同步的准确度和安全性提出了更高的要求。准确可靠的时钟源是智能电网保持精确时间同步、安全稳定运行的重要先决条件。针对外部时钟信号可能带有噪声抖动或发生畸变而导致系统失步,采用锁相环技术产生准确的时钟源信号从而提高时间同步准确度。同时引入一种群智能优化算法——差分进化算法对锁相环进行最优化设计。仿真结果表明,该方法可以较好跟踪参考时钟信号,获得准确的时钟信号,是一种有效可行的新方法。
With the rapid development of smart grid, higher requirements are put forward on the accuracy and security of time synchronization. An accurate and reliable clock source is an important prerequisite for smart grids to maintain accurate time synchronization, safe and stable operation. External clock signal may have noise jitter or distortion resulting in system out of synchronization using phase-locked loop technology to generate accurate clock source signal to improve time synchronization accuracy. At the same time, a group of intelligent optimization algorithm - differential evolution algorithm for phase-locked loop optimization design. The simulation results show that this method can track the reference clock signal well and obtain the accurate clock signal, which is a new and effective method.