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本文提出了一种容错的多Ｔｒａｎｓｐｕｔｅｒ的体系结构。该体系结构采用并行处理芯片Ｔｒａｎｓｐｕｔｅｒ作为基本处理单元，利用多Ｔｒａｎｓｐｕｔｅｒ并行处理系统的并行性、可拓扑性，用软件实现了带一个后援备份的三倍任务仿作的动态混合冗余，达到了高可靠性的目标。在保证高可靠性的前提下，该体系结构还使资源的消耗最少。该体系结构能连续容忍系统处理单元的单故障，并自动地启动后援备份进行重构，具有很高的可靠性、实时响应能力、可配置性和可扩充性。
This paper presents a fault-tolerant multi-Transputer architecture. The architecture uses the parallel processing chip Transputer as the basic processing unit. Utilizing the parallelism and topologicality of multiple Transputer parallel processing systems, the dynamic mixed redundancy with three times of backup as a backing backup is implemented in software, achieving high The goal of reliability. The architecture also minimizes resource consumption while ensuring high reliability. The architecture continuously tolerates single failure of system processing units and automatically enables backup backup for reconfiguration with high reliability, real-time responsiveness, configurability and scalability.