论文部分内容阅读
循环冗余校验(CRC)在很多通信和数据处理领域中得到广泛采用,不同应用领域对其计算需求呈现不规则的情况,无法用统一的方法实现。针对鲁棒包头压缩(ROHC)应用对CRC计算的具体需求(包括数据包序列位数不等、数据长度不规则等),以CRC串行电路结构为基础,得到相应的并行计算公式,设计并优化了CRC生成硬件逻辑结构。该硬件结构简单,不同生成多项式的并行实现电路之间切换调用灵活,数据吞吐量最高可以达到3Gb/s,能够满足无线通信ROHC实时、不规则数据处理的需要。
Cyclic Redundancy Check (CRC) has been widely adopted in many fields of communication and data processing. Different application areas have irregular requirements on their computing requirements and can not be implemented in a unified way. Aiming at the specific requirements of CRC calculation for ROHC (including the number of bits of data packet, irregular data length, etc.), the corresponding parallel computing formulas are obtained based on the structure of CRC serial circuit. Optimized CRC generation hardware logic structure. The hardware has a simple structure and flexible switching between parallel generating circuits with different generating polynomials. The data throughput can reach up to 3Gb / s, which can meet the needs of ROHC real-time and irregular data processing in wireless communications.