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提出了一种基于FPGA的TFT-LCD控制器设计方案,通过片外增加显示存储器SDRAM,以及用于储存多种字库和图片的FLASH芯片,片内嵌入精简指令集和图形加速引擎的方法,增强在文字和图形控制上的灵活性。在系统模块层次划分的基础上,利用Verilog硬件描述语言对各模块进行描述和设计,并在Xilinx的XC3S500E上加以实现。测试结果表明,该系统可支持分辨率最大为800×600的TFT-LCD显示屏,刷新频率达到60 Hz,并支持图文混排显示等功能。
A design scheme of TFT-LCD controller based on FPGA is proposed. By increasing the amount of display memory (SDRAM) on-chip and a FLASH chip for storing various font and pictures, a method of embedding a reduced instruction set and a graphics acceleration engine on chip is proposed. Flexibility in text and graphics control. Based on the system module hierarchy, each module is described and designed by Verilog hardware description language and implemented on Xilinx XC3S500E. The test results show that the system can support the maximum resolution of 800 × 600 TFT-LCD display, refresh rate of 60 Hz, and support for text and video display and other functions.