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多处理器系统芯片设计的关键问题之一是微处理器之间的互连结构.在总线互连结构和开关互连结构之后,提出了基于多端口存储器的第3种互连结构.利用VHDL进行了多时钟多端口存储器设计,并利用EDA工具进行了片上系统芯片的多微处理器数据通讯的功能仿真.分析了基于总线、基于开关、基于多端口存储器的3种互连结构的特点.研究表明基于多端口存储器的互连结构具有异步数据传输,数据缓冲功能;具有数据传输延时小,多微处理器系统芯片的拓扑阵列规模可扩展的优点.
One of the key problems of multiprocessor system chip design is the interconnection structure between microprocessors.After the bus interconnection structure and the switch interconnection structure, a 3-type interconnection structure based on multi-port memory is proposed.Using VHDL The multi-clock multi-port memory design was carried out, and the function simulation of multi-microprocessor data communication of the system-on-chip based on EDA was carried out.The characteristics of three kinds of interconnection structures based on bus, switch and multi-port memory were analyzed. Research shows that the multi-port memory-based interconnect structure has asynchronous data transmission and data buffering functions, and has the advantages of small data transmission delay and scalable topological array of multi-processor system chip.