本文对极快速微程序同步和可写控制存贮器所驱动的控制序列发生器,提出了三种设计。这三种设计是根据射极耦合逻辑的使用现状和将来发展提出来的,其中的一种设计可直接用于现在的射极耦合逻辑小型计算机结构,另外的两种设计是假想的。其中的一个模件成本大约为60,000美元,另一个完全利用可写控制存贮器的随机存取存贮器取数。使用上述设计的微周期在90以下-50以下毫微秒。 This paper presents three designs for the control sequencer driven by very fast microprogramming synchronous and writeable control memories. These three designs are based on the current state and future development of emitter-coupled logic. One of these designs can be directly used in present-day emitter-coupled logic small computer architectures. The other two designs are hypothetical. One of the modules costs about $ 60,000 and the other takes full advantage of the amount of RAM available for write control memory. Micro-cycles using the above design are below 90 nanoseconds -50.