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针对低频射频识别(RFID)晶圆测试中耗时久、效率低的问题,设计了一种32通道并行测试系统。系统基于32通道垂直探针卡,采用直接耦合方式,达到芯片实际工作条件。利用现场可编程门阵列(FPGA),实现测试向量的快速生成和信号解码的高速处理。通过专用硬件测试电路,对已调信号进行包络检波、滤波放大、电平判决,解调出被测芯片(DUT)编码信息。凭借通用接口总线(GPIB)完成探针台与上位机的数据交换,获得晶圆图。经测试,系统能够稳定、快速实现对低频RFID晶圆进行32通道并行测试,与传统单通道串行测试相比,测试时间至少优化了95.4%。测试结果表明系统缩短了测试时间、提高了测试效率,可适用于批量测试应用。
Aiming at the problem of time consuming and low efficiency in low frequency radio frequency identification (RFID) wafer testing, a 32-channel parallel test system is designed. System is based on 32-channel vertical probe card, using direct coupling, to achieve the actual chip operating conditions. The use of field programmable gate array (FPGA), to achieve the rapid generation of test vectors and signal decoding high-speed processing. Through the dedicated hardware test circuit, the modulated signal envelope detection, filter amplification, level decision, demodulate the chip under test (DUT) encoding information. With the universal interface bus (GPIB) to complete the probe station and the host computer data exchange, wafer map. The system was tested to achieve a 32-channel parallel test of low-frequency RFID wafers in a fast, stable, and fast manner, with test times optimized by at least 95.4% over traditional single-channel serial tests. The test results show that the system has shortened the test time, improved the test efficiency, and can be applied to the batch test application.