A ball grid array (BGA) package based on Si interposer with through silicon via (TSV) was designed. Thermal behaviors of the designed BGA with Si interposer has been analyzed and compared to a conventional BGA with BT substrate in the approach of finite element modeling (FEM). The Si interposer with TSV was then fabricated and the designed BGA package was demonstrated. The designed BGA package includes a 100 μm thick Si interposer, which has redistribution copper traces on both sides. Through vias with 25 to 40 μm diameter were fabricated on the Si interposer using deep reactive ion etching (DRIE), plasma enhanced chemical vapor deposition (PECVD), copper electroplating and chemical mechanical polishing (CMP), etc. TSV in the designed interposer is used as electrical interconnections and cooling channels. 5 mm by 5 mm and 10 mm by 10 mm thermal chips were assembled on the Si interposer. Thermal behaviors of the designed BGA with Si interposer has been analyzed and a conventional BGA with BT substrate in the approach of finite element modeling (BGA) package based on Si interposer with through silicon via (TSV) was designed. (FEM). The Si interposer with TSV was then fabricated and the designed BGA package was demonstrated. The designed BGA package includes a 100 μm thick Si interposer, which has redistribution copper traces on both sides. Through vias with 25 to 40 μm diameter were fabricated on the Si interposer using deep reactive ion etching (DRIE), plasma enhanced chemical vapor deposition (PECVD), copper electroplating and chemical mechanical polishing (CMP), etc. TSV in the designed interposer is used as electrical interconnections and cooling channels. 5 mm by 5 mm and 10 mm by 10 mm thermal chips were assembled on the Si interposer.