论文部分内容阅读
提出了一种pn混合下拉网络技术,即在多米诺门的下拉网络中混合使用pMOS管和nMOS管来降低电路的功耗并提高电路的性能.首先,应用此技术设计了多米诺异或门,与标准的n型多米诺异或门相比,新型异或门的静态功耗和动态功耗分别减小了46%和3%.然后,在此技术的基础上,综合应用多电源电压技术和双阈值技术设计了功耗更低的多米诺异或门,与标准的n型多米诺异或门相比,静态功耗和动态功耗分别减小了82%和21%.最后分析并确定了4种多米诺异或门的最小漏电流状态和交流噪声容限.
A pn hybrid pull-down network technology is proposed, that is, the pMOS tube and the nMOS tube are mixed in the pull-down network of the domino gate to reduce the power consumption of the circuit and improve the performance of the circuit.Firstly, Compared to the standard n-type domino or gate, the new XOR gate static power consumption and dynamic power consumption decreased by 46% and 3% respectively.Then, on the basis of this technology, the comprehensive application of multi-supply voltage technology and double Threshold technology designed domino or gate with lower power consumption, compared with the standard n-type Domino or gate, the static power consumption and dynamic power consumption decreased by 82% and 21% respectively.Finally, we analyzed and identified 4 The minimum leakage current and AC noise margin for a domino or gate.