使用裂缝尖端附近小矩形路径J积分方法计算电子封装分层传播的能量释放率,并在热循环加载下使用高频超声显微镜技术测定了B型和D型两种倒装焊封装在焊点有无断裂时芯片/底充胶界面的分层裂缝扩展速率。由有限元模拟给出的能量释放率和实验测得的裂缝扩展速率得到可作为倒装焊封装可靠性设计依据的Paris半经验方程。 Using the method of J-integral of small rectangular path near the crack tip to calculate the energy release rate of electronic package stratified propagation, and using the method of high-frequency ultrasonic microscopy under the thermal cycling loading, the two types of flip-chip packages, B and D, Stratified crack propagation rate at chip / underfill interface without fracture. The semi-empirical Paris equation, which can be used as the reliability design basis of the flip-chip package, is obtained from the energy release rate given by the finite element simulation and experimentally measured crack propagation rate.