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提出并证明了一种简便、快速的功耗估计方法:通过加入异或门将动态CMOS逻辑电路中的耦合电容变为接地电容,变换后的电路与原电路具有完全相同的功耗,从而可以采用现有的门级功耗估计工具求得整个电路的功耗。考察了在已知节点信号概率和节点信号间相关系数的条件下,通过相关系数法得到互连线网功耗的方法。可以证明,两种方法是等价的,即加入异或门可以隐含地保证信号的相关性,并且去耦过程毫无精度损失。最后,通过加入更复杂的逻辑电路,还可以将静态CMOS电路去耦,从而可以利用传统的动态电路的节点概率方法求出静态电路的功耗。
A simple and fast power estimation method is proposed and proved. The coupling capacitor in the dynamic CMOS logic circuit is changed to a ground capacitor by adding an XOR gate, and the transformed circuit has exactly the same power consumption as the original circuit, so that it can be used The existing gate-level power estimation tool to calculate the power consumption of the entire circuit. The method of obtaining the power consumption of the interconnection network by the correlation coefficient method under the condition of knowing the correlation coefficient between the node signal probability and the node signal is investigated. It can be shown that the two methods are equivalent, ie the addition of XOR gates implicitly ensures signal correlation and there is no loss of accuracy in the decoupling process. Finally, the static CMOS circuit can be decoupled by adding more complex logic circuits, so that the power consumption of the static circuit can be calculated by using the node probability method of the traditional dynamic circuit.