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基于低压BCD工艺,与华润上华合作开发了1μm 600VBCD工艺平台,可以集成600V高压LDMOS和高压结终端。基于此工艺平台,设计了一种高压半桥栅驱动电路。该电路具有独立的低端和高端输入通道,内置长达1μs的死区时间,防止高低端同时导通。采用双脉冲电平位移结构完成15～615V的电平位移,同时集成过流和欠压等保护功能。高端采用新型的电平位移结构,版图面积减小12%。测试结果表明,高端浮置电平可以加到750V,高低端输出上升时间为50ns,延迟匹配为150ns,输出峰值电流大于2A,电路响应快,可靠性高。
Based on the low-voltage BCD process, we have developed a 1μm 600VBCD process platform in collaboration with China Resources Shanghai, which integrates 600V high-voltage LDMOS and high-voltage termination. Based on this process platform, a high-voltage half-bridge gate driver circuit is designed. The circuit has a separate low-end and high-end input channels, built-in up to 1μs dead time to prevent both ends of high and low conduction. Double pulse level displacement structure to complete the level of 15 ~ 615V displacement, while integrated over-current and under-voltage protection. High-end level shift structure with a new layout area reduced by 12%. The test results show that the high-end floating level can be added to 750V, high-low-side output rise time of 50ns, delay matching 150ns, the output peak current greater than 2A, fast circuit response, high reliability.