A low drift curvature-compensated bandgap reference with trimming resistive circuit

来源 :Journal of Zhejiang University-Science C(Computers & Electro | 被引量 : 0次 | 上传用户:gyl720909
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A low temperature drift curvature-compensated complementary metal oxide semiconductor (CMOS) bandgap ref-erence is proposed.A dual-differential-pair amplifier was employed to add compensation with a high-order term of TlnT (T is the thermodynamic temperature) to the traditional 1st-order compensated bandgap.To reduce the offset of the amplifier and noise of the bandgap reference,input differential metal oxide semiconductor field-effect transistors (MOSFETs) of large size were used in the amplifier and to keep a low quiescent current,these MOSFETs all work in weak inversion.The voltage reference’s temperature curvature has been further corrected by trimming a switched resistor network.The circuit delivers an output voltage of 3 V with a low dropout regulator (LDO).The chip was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC)’s 0.35-μm CMOS process,and the temperature coefficient (TC) was measured to be only 2.1×10 6/°C over the temperature range of 40-125 °C after trimming.The power supply rejection (PSR) was 100 dB @ DC and the noise was 42 μV (rms) from 0.1 to 10 Hz. A low temperature drift curvature-compensated complementary metal oxide semiconductor (CMOS) bandgap ref-erence is proposed. A dual-differential-pair amplifier was employed to add compensation with a high-order term of TlnT (T is the thermodynamic temperature) to the traditional 1st-order compensated bandgap. To reduce the offset of the amplifier and noise of the bandgap reference, input differential metal oxide semiconductor field-effect transistors (MOSFETs) of large size were used in the amplifier and keep a low quiescent current, these MOSFETs all work in weak inversion. The voltage reference’s temperature curvature has been further corrected by trimming a switched resistor network. The circuit delivers an output voltage of 3 V with a low dropout regulator (LDO). The chip was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC) ’s 0.35-μm CMOS process, and the temperature coefficient (TC) was measured to be only 2.1 × 10 6 / ° C over the temperature range of 40-125 ° C after tri mming. The power supply rejection (PSR) was 100 dB @ DC and the noise was 42 μV (rms) from 0.1 to 10 Hz.
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