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主要进行了34-36GHz平衡二倍频器的设计与仿真。倍频电路采用平衡式结构,输入、输出端分别只有奇次和偶次谐波,有良好的隔离性,便于在输入、输出端分别进行阻抗的匹配[1]。采用CPW作为安装并联器件的平衡电路,为了与CPW配合,使用槽线到微带的过渡实现Balun电桥[2]。此设计中包含了微带-CPW过渡,槽线-微带过渡结构以及微带-波导过渡结构,信号经SMA接头输入,由WR-28标准波导输出。得到的平衡二倍频器,在输入频率17-18GHz,输出频率34-36GHz的频带内,变频损耗在5.507dB-6.503dB之间,倍频性能良好。
The main 34-36GHz balanced doubler design and simulation. The frequency multiplier circuit adopts a balanced structure, with only odd and even harmonics at the input and output, respectively. It has good isolation and facilitates impedance matching at the input and output terminals respectively [1]. The CPW is used as the balanced circuit for the parallel devices. In order to cooperate with the CPW, the Balun bridge is realized by using the transition from slotline to microstrip [2]. This design includes microstrip-CPW transition, slotline-microstrip transition structure and microstrip-waveguide transition structure. The signal is input via SMA connector and output by WR-28 standard waveguide. The resulting balanced doubler, in the input frequency of 17-18GHz, the output frequency of 34-36GHz band, the conversion loss between 5.507dB-6.503dB, multiplier performance is good.