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基于铜的随动强化模型,使用三维有限元方法,分析在窄-宽线铜互连结构中添加伪通孔对互连应力诱生空洞的影响。对宽互连M1分别为无伪通孔、中间添加伪通孔、右侧边沿添加伪通孔和添加双伪通孔结构进行了研究。结果表明,添加伪通孔不但可以降低通孔底部互连M1区域的空洞生长速率,而且使伪通孔正下面的互连M1成为额外的空位收集器,从而有效地提高互连应力诱生空洞性能,双伪通孔可进一步增强应力诱生空洞性能。
Based on the follow-up hardening model of copper, a three-dimensional finite element method was used to analyze the effect of adding pseudo-vias to the interconnection stress-induced voids in narrow-width copper interconnect structures. The research shows that the wide interconnects M1 are dummy-free vias, dummy vias in the middle, dummy vias on the right-hand edge, and double dummy vias. The results show that the addition of dummy vias not only can reduce the void growth rate in the bottom M1 of the via, but also makes the additional M1 immediately below the dummy via to be an additional vacancy collector, effectively increasing the stress induced in the interconnect Performance, double pseudo-vias can further enhance the stress-induced voids.