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本文描述以并行算术功能(16×16乘法器与16位加法器)为基础设计的高速FFT计算机。由于阵列乘法器是此类计算机中的关键大规模集成电路,故将以较多的篇幅描述它的设计方法。
This article describes a high-speed FFT computer based on parallel arithmetic functions (16 × 16 multiplier and 16-bit adder). Since array multipliers are the key LSIs in such computers, they will be described in more detail.