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日前,日本东芝、索尼公司在东京宣布,两家公司将继2001年共同发表90纳米级大规模集成电路(LSI)技术之后,再度联手推出有关65纳米级 LSI 技术的论文。此举表明,两家公司率先完成了 SoC 用65纳米级 DRAM 混载 CMOS 技术的开发,从2001年开始的两家公司的合作再次获得了成功。据称,由东芝和索尼两家公司共同开发的“65纳米级系统 LSI 技术”集世界上转换速度最快的高性能器件、世界上体积最小的混载 DRAM 元件和世界上体积最小的混载SRAM 元件这3项要素于一身,从而率先确立了在一块芯片上同时容纳高性能微处理器和大容量存储器的技术。此次东芝在65纳米芯片处理技术方面的突出成绩,将会大大提高 LSI 的使用效率。
Recently, Toshiba Japan and Sony announced in Tokyo that the two companies will once again jointly launch a paper on 65-nanometer LSI technology following the joint announcement of 90-nanometer-class LSI technology in 2001. The move shows that the two companies took the lead in completing the development of SoC’s 65-nm-class DRAM hybrid CMOS technology, and the two companies, which began in 2001, have once again been successful. Allegedly, “65 nanometer system LSI technology” jointly developed by Toshiba and Sony two sets the world’s fastest high-performance devices, the world’s smallest mixed-load DRAM components and the world’s smallest Mixed with SRAM components in all three elements, which took the lead in establishing a chip to accommodate both high-performance microprocessors and high-capacity memory technology. The Toshiba 65-nanometer chip processing technology outstanding achievements, will greatly improve the efficiency of LSI.