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A novel polysilicon-assisted silicon-controlled rectifier (SCR) is presented and analyzed in this paper, which is fabricated in HHNEC’s 0.18 μm EEPROM process. The polysilicon-assisted SCRs take advantage of polysilicon layer to help bypass electro-static discharge (ESD) current without occupying extra layout area. TLP current-voltage (I-V) measurement results show that given the same layout areas, robustness performance of polysilicon-assisted SCRs can be improved to 3 times of con- ventional MLSCR’s. Moreover, one-finger such polysilicon-assisted SCRs, which occupy only 947 μm2 layout area, can undergo 7-kV HBM ESD stress. Results further demonstrate that the S-type I-V characteristics of polysilicon-assisted SCRs are adjustable to different operating conditions by changing the device dimensions. Compared with traditional SCRs, this new SCR can bypass more ESD currents and consumes smaller IC area.
A novel polysilicon-assisted silicon-controlled rectifier (SCR) is presented and analyzed in this paper, which is fabricated in HHNEC’s 0.18 μm EEPROM process. The polysilicon-assisted SCRs take advantage of polysilicon layer to help bypass electro-static discharge (ESD) TLP current-voltage (IV) measurement results show that gives the same layout areas, robustness performance of polysilicon-assisted SCRs can be improved to 3 times of con- ventional MLSCR’s. Moreover, one-finger such polysilicon -assisted SCRs, which occupy only 947 μm2 layout area, can undergo 7-kV HBM ESD stress. traditional SCRs, this new SCR can bypass more ESD currents and consumes less IC area.