测试问题日益成为VLSI发展中的瓶颈问题,为了减少测试的困难,人们普遍接受的途径是在设计过程中就考虑电路的可测性,即采用可测性设计(DesLgn fo:Testab;lity)方法以减低测试成本。在可测性设计过程中可测性分析是极其重要的一环,所谓可测性是一种定量的测度,表示系统测试难易或测试性价比合理的程度。通过可测性分析人们可以找出电路中较难测试的区域,以便修改设计,降低 Test problems are increasingly becoming bottlenecks in the development of VLSI. In order to reduce testing difficulties, it is generally accepted that the testability of the circuit is taken into consideration in the design process, that is, the Desirable Test Method To reduce test costs. Testability analysis is an extremely important part in the testability design process. Testability is a quantitative measure that indicates the degree to which system testing is easy or the test cost is reasonable. By testability analysis, one can find areas that are harder to test in the circuit in order to modify the design and reduce