【摘 要】
:
USB3.0 作为最新一代的USB 传输标准,旨在满足高清视频流媒体和大型数字文件传输带宽的要求,经历了两年多的市场培育之后,即将开始大范围的使用。本文介绍了一种基于USB 3.0 协议的设备端控制器IP核设计。着重研究了USB3.0 链路层与协议层的工作模式控制的硬件数字电路实现。该电路支持超高速USB (SuperSpeed USB 5Gb/s)数据率的传输。为了满足USB 3.0 高速的传输
【机 构】
:
北京大学上海微电子研究院 上海 201203
【出 处】
:
2011年(第九届)中国通信集成电路技术与应用研讨会暨中国通信学会通信专用集成电路委员会十周年年会
论文部分内容阅读
USB3.0 作为最新一代的USB 传输标准,旨在满足高清视频流媒体和大型数字文件传输带宽的要求,经历了两年多的市场培育之后,即将开始大范围的使用。本文介绍了一种基于USB 3.0 协议的设备端控制器IP核设计。着重研究了USB3.0 链路层与协议层的工作模式控制的硬件数字电路实现。该电路支持超高速USB (SuperSpeed USB 5Gb/s)数据率的传输。为了满足USB 3.0 高速的传输要求,整个系统采用全硬件电路进行设计,减少SoC中CPU的软件运算量,同时使用了单脉冲同步器来同步不同时钟域所产生的串扰问题,因此电路具有在超高速传输时更加稳定的优点。设计的电路经过FPGA验证板的模拟,使用 0.13um 库的综合结果不包含存储器的逻辑门数为18.5 万门。
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