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5. A High-PSRR ADPLL with Self-Regulated GRO TDC and DCO-Dedicated Voltage Regulator

A High-PSRR ADPLL with Self-Regulated GRO TDC and DCO-Dedicated Voltage Regulator

来源 :2015 International Symposium on VLSI Design, Automation and | 被引量 : 0次 | 上传用户：lilianmm

【摘 要】

：

This paper describes a PSRR enhancing method for the all-digital phase-locked loop ADPLL by utilizing a self-regulated gated ring-oscillator SR-GRO time-to-digi

【作 者】

：

Yanfeng Li Yutao Liu Woogeun Rhee Zhihua Wang 

【机 构】

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TsinghuaUniversity,China

【出 处】

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2015 International Symposium on VLSI Design, Automation and

【发表日期】

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2015年4期

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论文部分内容阅读

This paper describes a PSRR enhancing method for the all-digital phase-locked loop ADPLL by utilizing a self-regulated gated ring-oscillator SR-GRO time-to-digital converter TDC and a voltage regulator just for a digitally-controlled oscillator DCO.

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