论文部分内容阅读
在精密的时间测量系统中,为了获得严格的定时同步脉冲,必须消除多级分频器所产生的误差,因而需用比较复杂的分频系统。本文专门讨论了利用脉冲选择的晶体管化同步分频系统的线路综合原理和研制技术问题,对组成系统的各种单元脉冲电路,如晶体管窄脉冲形成器,晶体管间歇振荡器,晶体管多谐振荡器,晶体管延迟电路以及晶体管门电路等均作了较深入的分析,并给出相应的实验结果。系统的主振信号是由一100千赫晶体稳频的振荡器产生,通过多级脉冲选择的双侧同步分频电路,可以同时获得稳定的100千赫,10千赫,1千赫及100赫等重复频率同步窄脉冲,同步脉冲的宽度为0.4微秒,幅度大于3伏。实验结果与理论分析基本上是一致的。
In the precision time measurement system, in order to obtain the strict timing synchronization pulse, must eliminate the error which the multistage frequency divider produces, therefore needs the more complex frequency division system. This article is devoted to discussing the principle of line synthesis and the research and development of the transistor-based synchronous frequency-division system using pulse selection. The pulse-shaping circuits of various unit circuits, such as transistor narrow pulse generator, transistor intermittent oscillator, transistor multivibrator , Transistor delay circuit and transistor gate are made in-depth analysis, and gives the corresponding experimental results. The system's main oscillator signal is generated by a 100 kHz crystal frequency-stabilized oscillator. The two-sided synchronous divider circuit with multi-level pulse selection provides stable 100 kHz, 10 kHz, 1 kHz, and 100 Hz and other repetitive frequency synchronization narrow pulse synchronization pulse width of 0.4 microseconds, amplitude greater than 3 volts. Experimental results and theoretical analysis are basically the same.