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当前,制造半导体器件的PN结主要有扩散法和外延生长法.扩散法是将硅片长时间地置于1000℃以上的高温下,让P型和N型杂质往硅片内扩散;而外延法则是让P型和N型的晶体层逐渐生长.有时,为提高器件的反压,需要加厚P型和N型层,若采用上述工艺,除花费时间长外,硅片长时间地裸露在高温下,势必产生杂质浓度不均匀和晶体质量下降等问题,因而限制着半导体器件向高反压、高速化的发展.日本东芝公司研究成功一种新的PN结直接合成法,能解决器件高反压和高速化的问题,而且可缩短工艺时间,过去需要3～10天才能形成的PN结,现在约要2小时就可以了.
At present, the PN junctions for manufacturing semiconductor devices mainly include a diffusion method and an epitaxial growth method, wherein the diffusion method places the silicon wafer at a high temperature of more than 1000 ° C. for a long time to diffuse P-type and N-type impurities into the silicon wafer, The law is to allow the gradual growth of the P-type and N-type crystal layer.Often, in order to improve the device back pressure, you need to thicken the P-type and N-type layer, if the above process, in addition to take a long time, Under high temperature, it is bound to produce non-uniform impurity concentration and crystal quality problems, thus limiting the semiconductor devices to high back pressure, high-speed development.Japan Toshiba successfully researches a new PN junction direct synthesis method, can solve the device High back pressure and high speed problems, but also shorten the process time, in the past need 3 to 10 days to form a PN junction, now about 2 hours on it.