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体系架构级缓存容错技术被认为是应对较高的永久位故障率的有效手段,但目前缓存容错机制的体系架构级评估工具较少。针对这个问题,提出CacheFI,即基于Simics的缓存故障注入工具,采用故障生成和注入分离的设计,故障生成是随机分布、模式和时序三个方面的结合,故障注入则考虑了故障可重现性和模块化的需要。在全系统模拟器Simics上,基于15个选自SPEC CPU2000的测试程序,利用CacheFI对Buddy和MAEP等典型的体系架构级缓存容错机制进行评估,展现了其弱点和典型的片上缓存容错机制存在的问题。
Architecture-level cache fault tolerance is considered as an effective means of coping with higher permanent bit failure rates, but there are less architectural-level evaluation tools for cache fault tolerance. In response to this problem, CacheFI is proposed, which is based on Simics cache fault injection tools, the use of fault generation and injection separation design, fault generation is random distribution, mode and timing of the three aspects of fault injection is to consider the fault reproducibility And modular needs. Based on 15 test programs selected from SPEC CPU 2000, the full-system simulator Simics uses CacheFI to evaluate typical architecture-level cache fault tolerant mechanisms such as Buddy and MAEP, demonstrating its weaknesses and typical on-chip cache fault tolerance mechanisms problem.