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Cryogenic CMOS circuits provide a great promise at very high speed operation because of the enhanced mobility of the carriers at low temperature. However, at low temperature, part of the impurities in Si will not be ionized because the Fermi level moves toward the bottom of conduction band(n-Si) or the top of the valence band(p-Si). In the channel region of MOSFET, the freezeout of the carriers is determined not only by the temperature but also the band bending caused by the gate voltage. In this paper, the effects of carrier freezeout on the characteristics of cryogenic CMOS devices are investigated through a numerical simulation and the measurement of device I-V characteristics at liquid nitrogen temperature. It is found that, at 77K, the impurities in the channel region of the surface channel device are completely ionized while that of the burried channel
Cryogenic CMOS circuits provide a great promise at very high speed operation because of the enhanced mobility of the carriers at low temperature. However, at low temperature, part of the impurity in Si will not be ionized because the Fermi level moves toward the bottom of conduction band (n-Si) or the top of the valence band (p-Si). In the channel region of MOSFET, the freezeout of the carriers is determined not only by the temperature but also the band bending caused by the gate voltage. In this paper, the effects of carrier freezeout on the characteristics of cryogenic CMOS devices are investigated through a numerical simulation and the measurement of device IV characteristics at liquid nitrogen temperature. It is found that at 77K, the impurity in the channel region of the surface channel device are completely ionized while that of the burried channel