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为了满足数字电路故障诊断的测试需求,根据边界扫描测试标准IEEE1149.1设计了数字电路测试主控系统。系统以FPGA为控制核心,利用计算机的USB总线控制JTAG总线,实现对被测数字电路的测试。该系统能控制四路JTAG总线,且引入了FIFO以提高边界扫描的测试速度。对FIFO、USB总线及JTAG总线的控制等均在一片FPGA中实现,硬件结构简单,体积小。实验证明,用该系统可对支持IEEE1149.1标准的数字电路的状态进行控制和捕获,能方便高效地完成对数字电路的测试。
In order to meet the digital circuit fault diagnosis test requirements, according to the boundary scan test standard IEEE1149.1 designed digital circuit test master control system. System to control the core of the FPGA, the use of the computer’s USB bus control JTAG bus to achieve the digital circuit under test. The system can control four JTAG bus, and the introduction of the FIFO to improve the speed of the boundary scan test. The FIFO, USB bus and JTAG bus control and so on are implemented in a FPGA, the hardware structure is simple, small size. Experiments show that the system can be used to support the IEEE1149.1 standard digital circuit status control and capture, can easily and efficiently complete the digital circuit test.