This paper presents a low-power low-cost780 MHz CMOS Frequency shift keying(FSK) receiver for short-range wireless communication. A current-reused Low power amplifier(LNA) and a single-balance passive mixer are employed to cut down the current consumption of the RF frontend in receiver. A 3rd-order active-RC complex filter with reconfigurable bandwidth is implemented and a novel automatic tuning circuit is used in the filter to eliminate the negative effect of the Process, voltage, temperature(PVT) variations. A novel replica-circuit master-slave automatic tuning circuit and a discrete-time differentiator are employed in demodulator to keep the demodulation performances from the PVT variations and the frequency offset of Intermediate frequency(IF). The receiver is fabricated in 0.18μm CMOS and occupies a chip area of about 0.97mm2. It can achieve a sensitivity of –83.7d Bm and a tolerance of IF range from 1.5MHz to 3.7MHz with a 4.7m A current consumption under a 1.8V supply. This paper presents a low-power low-cost 780 MHz CMOS Frequency Shift keying (FSK) receiver for short-range wireless communication. A current-reused Low power amplifier (LNA) and a single-balance passive mixer are employed to cut down the current consumption of the RF frontend in receiver. A 3rd-order active-RC complex filter with reconfigurable bandwidth is implemented and a novel automatic tuning circuit is used in the filter to eliminate the negative effect of the Process, voltage, temperature (PVT) variations. A novel replica-circuit master-slave automatic tuning circuit and a discrete-time differentiator are employed in demodulator to keep the demodulation performances from the PVT variations and the frequency offset of Intermediate frequency (IF). The receiver is fabricated in 0.18 μm CMOS and It can achieve a sensitivity of -83.7d Bm and a tolerance of IF range from 1.5MHz to 3.7MHz with a current consumption of 4.7m A 1.8V supply.