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介绍了一种S波段功率SiC MESFET芯片的研制技术。针对SiC材料的特点,对4H-SiC外延材料进行了设计和仿真,同时对Al记忆效应进行了研究,优化了4H-SiC外延生长技术。研究了栅长与沟道厚度纵横比(Lg/a)对短沟道效应和漏极势垒降低效应的影响。采用了凹槽栅结构和体标记电子束直写技术以及热氧化SiO2和SiNx复合钝化层设计等新制备工艺,实现了栅、漏泄漏电流的减小和源、漏击穿电压的提高。测试结果表明,功率SiC MESFET芯片在3.4 GHz频率下脉冲输出功率大于45 W,功率增益8.5 dB,漏极效率40%。测试条件为漏极工作电压48 V,脉宽100μs,占空比10%。
An S-band power SiC MESFET chip is introduced. According to the characteristics of SiC material, the 4H-SiC epitaxial material is designed and simulated. At the same time, the memory effect of Al is studied, and the 4H-SiC epitaxial growth technology is optimized. The effects of gate length and channel thickness aspect ratio (Lg / a) on short channel effect and drain barrier reduction effect were investigated. A novel fabrication process such as trench gate structure and bulk marker electron beam direct writing technology and thermal oxide SiO2 and SiNx composite passivation layer design are adopted to reduce the gate and leakage leakage current and improve the source and drain breakdown voltage. The test results show that the power SiC MESFET chip has a pulse output power of more than 45 W at a frequency of 3.4 GHz, a power gain of 8.5 dB, and a drain efficiency of 40%. Test conditions for the drain voltage of 48 V, pulse width 100μs, duty cycle 10%.