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在并行计算的计算机结构中,为了提高并行计算效率,希望主存在接近无冲突访问的条件下工作。除了考虑使数据在主存合理存放外,从硬件角度可以采用素数(m)个模块并行或交叉工作的存储器。这样就不能简单地从主存地址得到每个主存模块的模号和模内地址,而需要采用除以m的除法地址转换线路。本文提出一种对这类地址转换线路进行错误检测的简便方法。
In the computer structure of parallel computing, in order to improve the efficiency of parallel computing, we hope that the main existence of work under conditions close to conflict-free access. In addition to considering the data stored in the main reasonably stored, the hardware can be used in prime (m) modules parallel or cross-working memory. In this way, it is impossible to simply obtain the model number and the in-mold address of each main memory module from the main memory address, and use the divide-by-m address conversion circuit divided by m. This article presents a simple way to error-detect such address translation lines.