论文部分内容阅读
随着电子计算机的迅速发展,需要超高速的大规模集成电路。为了科研和生产的需要,这次毕业实践进行了D型触发器(ECL)的设计、研制与应用方面的工作,本文仅讨论D型触发器(ECL)的设计。该触发器为ECL电路系列,它具有速度快,集成度高等优点,所设计的D型触发器时延达到了3～4亳徽秒,功耗150亳瓦。单D电路的功能相当于由六个单门组成的维持阻塞型触发器,有晶体管41只,电阻38个,共79个元件。所设计的D型触发器为4D,单元版图为2D-FF,经二次布线构成4D-FF,集成度相当于25个门,晶体管164只,电阻142个,共306个元件。
With the rapid development of electronic computers, there is a need for ultra-high speed large scale integrated circuits. In order to meet the need of scientific research and production, this graduation practice has carried on the design, development and application of D type flip-flop (ECL). This article only discusses the design of D type flip-flop (ECL). The trigger ECL circuit series, it has the advantages of high speed, high integration, the design of the D-type flip-flop delay reached 3 to 4 milligrams seconds, power 150 MW. The function of a single D circuit is equivalent to maintaining a blocking flip-flop consisting of six single gates, with 41 transistors and 38 resistors, for a total of 79 components. The design of the D-type flip-flop for the 4D, cell layout for the 2D-FF, formed by the secondary wiring 4D-FF, the equivalent of 25 gates, 164 transistors, resistors 142, a total of 306 components.