论文部分内容阅读
为了研究侧壁隔离层对闪存器件可靠性的影响,分别制备了Si_3N_4和SiO_2-Si_3N_4-SiO_2-Si_3N_4(ONON)复合层作为栅侧壁隔离层的45 nm或非闪存(NOR flash)器件,对编程后、循环擦写后的闪存器进行栅极干扰的测试,讨论了不同栅侧壁隔离层对栅极干扰的影响。结果表明,虽然纯氧化硅隔离层可减少NOR自对准接触孔(SAC)刻蚀时对侧壁隔离层的损伤,但其在栅极干扰时在氧化物-氮化物-氧化物(ONO)处有更高的电场,从而在栅干扰后阈值电压变化较大,且由于在擦写操作过程中会陷入电荷,这些电荷在大的栅极电压和长时间的栅干扰作用下均会对闪存器的可靠性产生负面的影响。ONON隔离层的闪存器无可靠性失效。因此以ONON作为侧壁隔离层比以纯氮化硅作为侧壁隔离层的闪存器件具有更好的栅干扰性能。
In order to study the influence of sidewall spacers on the reliability of flash memory devices, a 45 nm or non-flash memory (NOR flash) device with Si_3N_4 and SiO_2-Si_3N_4-SiO_2-Si_3N_4 (ONON) After programming, the flash memory after cyclic erasure is tested for the gate disturbance, and the influence of different gate sidewall spacers on the gate disturbances is discussed. The results show that although the pure silicon oxide isolation layer can reduce the damage to the sidewall isolation layer during the NOR self-aligned contact hole (SAC) etching, the gate oxide layer is damaged in the oxide-nitride-oxide (ONO) There is a higher electric field so that the threshold voltage varies greatly after the gate disturbance and due to the charge trapping during the erase and write operation, these charges will flash to the flash memory under the action of large gate voltage and long-time gate interference The reliability of the device has a negative impact. ONON isolation flash memory no reliability failure. Therefore, ONON as a sidewall spacer has better gate interference performance than a flash memory device using pure silicon nitride as a sidewall spacer.