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我们提出了一种基于最小绝对值误差测试（MMAE）矢量编码器的VLSI结构．这一结构采用了误差测度的和值不等式判据、预排序的码书和最近邻搜索算法，并采用二分搜索方法和特殊的误差测度计算及比较结构，大大降低了系统的实现规模，同时采用并行流水线等设计技术，可以获得每8个时钟周期编码一个矢量的处理速度，整个系统采用硬件描述语言VHDL在Synopsys系统中进行了设计验证和综合．
We propose a VLSI structure based on a minimum absolute value error test (MMAE) vector encoder. This structure uses the sum of value inequality of error measure, pre-ordered codebook and nearest neighbor search algorithm, and uses binary search method and special error measure to calculate and compare the structure, greatly reducing the system’s implementation scale, Parallel pipeline and other design techniques can be obtained every 8 clock cycles encoding a vector processing speed, the system uses hardware description language VHDL in the Synopsys system design verification and synthesis.