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本文提出了一种推导∑△调制器输出等于逻辑１的概率方法，并研究了非理想因素对概率特性及∑△比特流信号处理的影响。
In this paper, we present a new method to derive the output of ΣΔ modulator equal to logic 1, and study the influence of non-ideal factors on the probability characteristics and signal processing of ΣΔ bit stream.