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本文研究了电子工程中所采用的二阶数字锁相环的物理结构,对其性能进行了分析,并把参数自校正方法用于数字锁相环,给出了实验及仿真结果。
In this paper, the physical structure of the second-order digital phase-locked loop used in electronic engineering is studied. The performance of the second-order digital phase-locked loop is analyzed and the method of parameter self-correction is applied to digital phase-locked loop. The experimental and simulation results are given.