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本文介绍了一种基于阻性肖特基二极管芯片UMS DBES105a的110GHz三倍频器,通过两个芯片反向并联形成了平衡结构,同时提高了倍频器的功率承受能力。电路设计中使用二极管三维电磁模型,匹配设计时未设计专门的输入过渡和滤波器,而是直接经行匹配设计,提供了更多的可优化参量,以达到最佳的匹配效果和带宽。经过HFSS和ADS联合仿真,在频率为31~44GHz,功率为20d Bm的驱动信号激励下,三倍频器输出频率大于7d Bm,最大输出功率为9.1d Bm@105GHz。
This paper introduces a 110GHz triple frequency multiplier based on the resistive Schottky diode chip UMS DBES105a. The two chips are connected in reverse parallel to form a balanced structure, and the power multiplier of the frequency multiplier is also improved. Circuit design using the diode three-dimensional electromagnetic model, matching design did not design a special input transition and filter, but directly through the row matching design, provides more parameters can be optimized to achieve the best match and bandwidth. After HFSS and ADS co-simulation, the output frequency of the tripler is more than 7d Bm and the maximum output power is 9.1d Bm @ 105GHz under the excitation of the drive signal with the frequency of 31-44GHz and the power of 20d Bm.