论文部分内容阅读
为了大规模集成电路的低能耗应用,提出了一种不完全绝热电路——自举能量回收逻辑电路(bootstrapenergyrecoverylogic,BERL)。该电路采用二相无交叠功率时钟。由于采用自举技术,使负载的冲放电过程不会产生非绝热损失,并且输出开关的导通电阻变小,使绝热损失降低。为了比较BERL电路与静态CMOS电路及PAL-2n绝热电路的能耗,设计了反相器链电路。Hspice软件仿真结果表明,BERL电路的工作频率可以超过400MHz。在10～100MHz下,BERL能耗只有静态CMOS电路的25%～33%。相对于PAL-2n电路,BERL也有较低的能耗。在200MHz下,BERL能耗只有PAL-2n的50%。负载越重,BERL电路的低能耗优势越明显。
For low power applications of large scale integrated circuits, an imperfect adiabatic circuit, the bootstrap energy recovery logic (BERL), is proposed. The circuit uses two-phase non-overlapping power clock. As a result of bootstrap technology, the process of loading and discharging load will not produce non-adiabatic loss, and the output switch on-resistance becomes smaller, so that adiabatic loss is reduced. In order to compare the energy consumption of BERL circuits with static CMOS circuits and PAL-2n adiabatic circuits, an inverter chain circuit was designed. Hspice software simulation results show that, BERL circuit operating frequency can exceed 400MHz. At 10 ~ 100MHz, BERL consumes only 25% ~ 33% of the static CMOS circuit. Compared with PAL-2n circuit, BERL also has lower energy consumption. The BERL consumes only 50% of PAL-2n at 200MHz. The heavier the load, the more significant the low power consumption of the BERL circuit is.