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MIL—STD—1750A描述了一种指令系统结构(ISA),应用此ISA时需要有能保障CPU、存贮器和面向应用的输入/输出设备之间有效通讯的数据和地址总线系统.由于CPU和主存贮器通常是数据和地址总线系统的主要用户,因此总线系统的设计和实现都要受到主存和CPU设计的影响.Lavi航空电子系统的许多部件都嵌入了MIL—STD—1750A计算机,在这种计算机中使用的是一种标准的数据和地址总线,称为“L总线”.本文描述了“L总线”并建议将它作为实现MIL—STD—1750A的潜在的标准总线.
MIL-STD-1750A describes an Instruction System Architecture (ISA) which requires a data and address bus system that can be used to effectively communicate between the CPU, memory, and application-oriented input / output devices. And main memory is usually the main user of the data and address bus systems, the design and implementation of the bus system is affected by main memory and CPU design. Many parts of the Lavi avionics system are embedded in the MIL-STD-1750A computer , A standard data and address bus is used in this computer called “L-bus.” This article describes the “L-bus” and recommends it as a potential standard bus for implementing the MIL-STD-1750A.