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This paper presents a capacitorless low-dropout(LDO)regulator with ultra-low quiescent current.The proposed circuit senses the transient output voltage of LDO to increase the slew-rate at the gate of the pass transistor.The proposed LDO regulator has been designed and simulated in SMIC 0.18μm CMOS process.Simulation results show that,the LDO regulator consumes a quiescent current of only 754nA at steady state.The maximum output current is 200mA.Moreover,the load regulation and line regulation are only 0.0395mV/V and 1.22mV/mA,respectively.