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一、目的及一般概念 测试码生成的问题是数字系统故障诊断的重要部份。对于数字系统中的组合电路,国内有些单位已经获得比较好的介决。在国内,中规规集成电路已经开始组装大型数字计算机系统。我们的测试码生成方法是用来解决中规模组件组装的插件测试工作的。 本文讨论的问题是指数字系统中固定型单故障——固定“0”故障或固定”1”故障或组件输入端开路故障。采用的算法是J.P.ROTH提出的D算法-Ⅱ,并根据G.R.PUT-ZOLU和J.P.ROTH提出的迭代方式解决时序电路问题。
First, the purpose and the general concept of test code generation problem is an important part of digital system fault diagnosis. For the digital system in the combination of circuits, some domestic units have been relatively well resolved. In China, China's ICs have started to assemble large-scale digital computer systems. Our test-code generation method is used to solve plug-in testing for assembly of medium scale components. The issue addressed in this article is fixed type single fault in digital systems - a fixed “0” fault or a fixed “1” fault or an open circuit fault at the input of a component. The algorithm used is the D-Algorithm-II proposed by J.P.ROTH and solves the problem of sequential circuits according to the iterative approach proposed by G.R.PUT-ZOLU and J.P.ROTH.