本文叙述‘与非’门t·t·l线路。它产生的窄脉冲与宽脉冲输入波形的前沿或后沿一致。同时也叙述一种新式的三门线路,它输出的窄脉冲与输入波形的前沿和后沿都一致。在触发器置‘0’或置‘1’时,常常希望它产生一种窄脉冲而与宽脉冲的前沿或后沿一致。要想实现这一性能,则在线路设计上可采用一对t·t·l‘与非’门元件,如图1和图2所示。至于这种线路所产生的脉冲究竟在前沿或在后沿,则由输入波形的极性来确定。若在图1的线路中加进一“逻辑l”输入脉冲(约 This article describes the NAND circuit t · t · l line. The narrow pulses it produces coincide with the leading or trailing edges of the wide pulse input waveform. Also describes a new three-door line, which outputs a narrow pulse with the front and back of the input waveform are consistent. When the flip-flop is set to '0' or set to '1', it is often desirable for it to produce a narrow pulse consistent with the leading edge or trailing edge of a wide pulse. To achieve this performance, a pair of t · l · NAND gate elements can be used in the circuit design, as shown in Figure 1 and Figure 2. Whether the pulse generated by this line is at the leading or trailing edge is determined by the polarity of the input waveform. If the line in Figure 1 to add a “logic l” input pulse (about