提出了一种HDTV解码器片上系统(SoC)平台的设计,可进行多种IP核的集成,如MIPs CPU、HDTV视频解码器、视频处理器、OSD及外围IP设备,这些IP核分别可通过一个独立的接口与平台相连接。通过对总线和存储器访问带宽的估计,可以进行有效的数据通路管理。无需改变平台的系统结构就可灵活地添加新的功能,因此该SoC架构适合广泛地应用于数字视频媒体处理。 An HDTV decoder system-on-chip (SoC) platform is designed to integrate a variety of IP cores such as MIPs CPUs, HDTV video decoders, video processors, OSDs and peripheral IP devices, respectively A separate interface to the platform. Through the bus and memory access bandwidth estimation, can be effective data path management. This new SoC architecture is suitable for a wide range of digital video media processing applications without the need to change the platform’s system architecture.