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提出一种使用环形振荡器对SRAM型FPGA内部延迟进行精确测试的方法。该方法利用SRAM型FPGA的可重构性在其内部构造环形振荡器,通过基准信号对分频后的振荡信号周期进行测量,从而得到环振回路中逻辑部件的延迟值。应用该方法,对一款Virtex-4型FPGA的内部延迟进行测试。结果表明:在环振初始振荡频率小于芯片工作极限频率的情况下,延迟测试的误差小于1 ps,与其他检测FPGA内部延迟故障的方法相比,检测精度有很大的提高,同时,该方法对SRAM型FPGA具有较高的普遍适用性。
A ring oscillator is proposed to accurately test the internal delay of SRAM type FPGA. The method utilizes the reconfigurability of the SRAM type FPGA to construct a ring oscillator therein, and measures the period of the frequency-divided oscillation signal by using the reference signal to obtain the delay value of the logic components in the loop-back loop. Apply this method to test the internal delay of a Virtex-4 FPGA. The results show that the error of the delay test is less than 1 ps when the initial oscillation frequency of the ring oscillator is less than the working frequency limit of the chip. Compared with other methods for detecting the delay fault in the FPGA, the detection accuracy is greatly improved. At the same time, SRAM type FPGA has a high universality.