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The thermal characteristics of high voltage gg-LDMOS under ESD stress conditions are investigated in detail based on the Sentaurus process and device simulators.The total heat and lattice temperature distributions along the Si–SiO2 interface under different stress conditions are presented and the physical mechanisms are discussed in detail.The influence of structure parameters on peak lattice temperature is also discussed,which is useful for designers to optimize the parameters of LDMSO for better ESD performance.
The thermal characteristics of high voltage gg-LDMOS under ESD stress conditions are investigated in detail based on the Sentaurus process and device simulators. The total heat and lattice temperature distributions along the Si-SiO2 interface under different stress conditions are presented and the physical mechanisms are discussed in detail. The influence of structure parameters on peak lattice temperature is also discussed, which is useful for designers to optimize the parameters of LDMSO for better ESD performance.