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提高VLSI集成度的重要途径之一是研究器件的新结构,发展三维集或电路,即在制成的MOS器件上形成一层SiO_2绝缘层,再在其上的再结晶多晶硅层上制作另一层MOS器件。近年来关于这方面的工艺研究已有一些报道。我们用高压电子显微镜对这种三维电
One of the important ways to improve VLSI integration is to study the new structure of the device and to develop a three-dimensional set or circuit by forming a layer of SiO 2 insulating layer on the formed MOS device and then fabricating another layer on the recrystallized polysilicon layer Layer MOS device. In recent years, there have been some reports on the technology research in this area. We use high-pressure electron microscopy of this three-dimensional electricity