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实现了基于可满足性(SAT)求解的方法,以解决固定型和时延故障的自动测试向量生成问题。详细讨论了如何利用电路的拓扑结构以及从ATPG到合取范式(CNF)的编码方法。CNF被输入到一个高效的SAT求解器zchaff中求解。在ISCAS85测试实例中验证了该算法的有效性。
The method based on satisfiability (SAT) is implemented to solve the problem of automatic test vector generation for fixed and delay faults. Discussed in detail how to use the topology of the circuit and the encoding method from ATPG to the occlusion pattern (CNF). CNF is solved in zchaff, an efficient SAT solver. The validity of this algorithm is verified in the ISCAS85 test case.