A low noise distributed amplifier consisting of 9 gain cells is presented.The chip is fabricated with 0.15-μm GaAs pseudomorphic high electron mobility transistor(PHEMT) technology from Win Semiconductor of Taiwan.A special optional gate bias technique is introduced to allow an adjustable gain control range of 10 dB.A novel cascode structure is adopted to extend the output voltage and bandwidth.The measurement results show that the amplifier gives an average gain of 15 dB with a gain flatness of±1 dB in the 2-20 GHz band.The noise figure is between 2 and 4.1 dB during the band from 2 to 20 GHz.The amplifier also provides 13.8 dBm of output power at a 1 dB gain compression point and 10.5 dBm of input third order intercept point(IIP3),which demonstrates the excellent performance of linearity.The power consumption is 300 mW with a supply of 5 V,and the chip area is 2.36×1.01 mm~2. A low noise distributed amplifier consisting of 9 gain cells is presented. The chip is fabricated with 0.15-μm GaAs pseudomorphic high electron mobility transistor (PHEMT) technology from Win Semiconductor of Taiwan. A special optional gate bias technique is introduced to allow an adjustable gain control range of 10 dB. A novel cascode structure is adopted to extend the output voltage and bandwidth. The measurement results show that the amplifier gives an average gain of 15 dB with a gain flatness of ± 1 dB in the 2-20 GHz band. The noise figure is between 2 and 4.1 dB during the band from 2 to 20 GHz. The amplifier also provides 13.8 dBm of output power at a 1 dB gain compression point and 10.5 dBm of input third order intercept point (IIP3), which demonstrates the excellent performance of linearity. The power consumption is 300 mW with a supply of 5 V, and the chip area is 2.36 × 1.01 mm ~ 2.