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可望制作吉(10~9)位动态随机存取存储器(RAM)和64M位静态RAM的 存储单元结构的进展,以及可在3.3V或更低电源电压下工作的高密度逻辑电路的发展,这些都是在IEDM会议上展示的重大进展,它表明存储器密度和逻辑电路的复杂性都在飞速提高.在多层金属互连和器件结构上的改进,也预示着下一代逻辑芯片的电路复杂性将会有重大改进.在第26会场,即“集成电路——先进的动态和静态RAM”会场上,有三篇论文着重谈到了一些最新存储器结构取得的最新进展.日本东芝公司、韩国三星电子公司和日本NEC公司均介绍了存储容量高达1吉位及超过1吉位的存储器使用的新颖存储单元结构和电路体系结构.
It is expected that the development of the memory cell structure of Kyrgyzstan (10 ~ 9) bit dynamic random access memory (RAM) and 64Mbit static RAM, as well as the development of high density logic circuits capable of operating at 3.3V or lower supply voltage, These are all significant developments at the IEDM meeting as it shows both the density of memory and the complexity of logic circuits are rapidly increasing.Optimization in the structure of multi-level metal interconnects and devices also indicates that the circuitry of the next generation of logic chips is complex There will be a major improvement in the 26th session, that is, “Integrated Circuits - Advanced Dynamic and Static RAM” session, there are three papers highlighted some of the latest advances in memory architecture made.Japan Toshiba, South Korea’s Samsung Electronics Both the company and Japan’s NEC Corp. have introduced a novel memory cell architecture and circuit architecture for memory usage up to 1 gigabyte and more than 1 gigabyte.