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通过对不同生长厚度GaN/SiC(n-n)的慢正电子研究,发现在GaN/SiC的界面中存在大量各种缺陷并在界面两端形成两个不同方向的电场.这些缺陷的产生和SiC衬底表面制备以及GaN和SiC不同的热膨胀系数有关.而缺陷中大量的带状缺陷在界面中形成一个费米能级钉扎(Fermi level pinning),它的存在使界面中存在一定高度的势垒,导致在界面两端的一定区域内形成两个不同方向的电场.用VEPFIT模拟该电场的存在,分四层(GaN/Interface/SiC1/SiC2)进行拟合,得到了很好的拟合效果,并可以给出电场的确定数值.这些电场的存在对正电子的湮没产生了重要影响,使得在SiC区域,有电场的区域内正电子的有效扩散长度减小.界面两端电场大小和界面的带电量以及界面宽度等信息有关,故对该电场的研究可以为研究真实的界面层及其性质的可能应用提供有效的参考价值.
Based on the slow positron studies of different growth thicknesses of GaN / SiC (nn), it was found that there are a large number of defects in the GaN / SiC interface and two electric fields in different directions at both ends of the interface. Bottom surface preparation and different thermal expansion coefficients of GaN and SiC, while a large number of ribbon defects in the defect form a Fermi level pinning in the interface, which makes the interface have a certain height barrier , Resulting in the formation of two different directions of the electric field in a certain region at both ends of the interface.VEPFIT simulation of the existence of the electric field, four layers (GaN / Interface / SiC1 / SiC2) to fit, get a good fitting effect, And can determine the value of the electric field.The existence of these electric fields has an important influence on positron annihilation, making the effective diffusion length of positrons decrease in the region of electric field in the SiC region.The size of the electric field and the interface Charge, and interface width. Therefore, the study of the electric field can provide an effective reference value for studying the real interface layer and its possible application.