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提出了用同步外延法设计和制造具有双介质层栅结构和非饱和电流电压特性的高频高功率静电感应晶体管的关键技术 .讨论了寄生栅源电容 Cgs对静电感应晶体管高频功率特性的影响 .描述了工艺上减小寄生电容、改善静电感应晶体管高频功率性能的主要方法和措施 .成功地制造出频率在 4 0 0 MHz时输出功率大于 2 0 W、功率增益大于 7d B、漏效率大于 70 %和 70 0 MHz时输出功率大于 7W、功率增益大于 5 d B,漏效率大于 5 0 %的高性能静电感应晶体管
The key technologies of high-frequency and high-power electrostatic induction transistor with double-dielectric gate structure and non-saturation current-voltage characteristic are designed and fabricated by the synchronous epitaxial method. The influence of parasitic gate capacitance Cgs on the high frequency power characteristics of the electrostatic induction transistor is discussed. The main methods and measures to reduce the parasitic capacitance and improve the high-frequency power performance of the electrostatic induction transistor are successfully manufactured.The output power is more than 20 W at 4 0 0 MHz, the power gain is more than 7d B, the leakage efficiency is more than 70% And 70 0 MHz output power is greater than 7W, the power gain greater than 5 d B, leakage efficiency greater than 50% of the high-performance electrostatic induction transistor